make - Makefile and $(wildcard) : Using complex regex -
given intricate relationship between bash , make, king of hoping $(wildcard ) command instead $(globbing ) command @ to the lowest degree take bash's globbing pattern such exclamation mark ? or curly brackets {}.
my research seems indicate doesn't else expanding wildcards.
is there known way utilize more complex 'regular expression'?
source : wildcard function on gnu.org
the relationship no closer make expects supplied $(shell) sufficiently close /bin/sh in respects. on windows, many people utilize cmd.exe.
you can utilize the $(shell) function invoke utility have installed through shell:
c_source_files = $(shell echo *.[ch]) images = $(shell find * -maxdepth 2 -type f | egrep -i '\.(gif|png|jpg)$$') whatever please.
make
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